High Aspect Ratio Si Etching in STS2

Deep reactive ion etching (DRIE) is one of the most important etching techniques because it is independent of crystal orientation and does not require any wet process. DRIE can be applied for many applications. For examples, this technique can be used to fabricate MEMS devices (e.g. accelerometers, scanners, etc.), microfluidic devices, electrical through wafer interconnects, and so on. In many cases, when DRIE can achieve high aspect ratio (AR) silicon etching, device design flexibility can be increased and device performance also can be improved. Therefore, it is important to have high AR etching recipes. In this paper, I discuss the background for high AR process, and introduce three different recipes that have been developed for use in STS2: (1) HAR recipe, (2) low frequency bias recipe, and (3) low power recipe. HAR recipe is developed to achieve the AR over 40 for 2μm-wide trenches. The low frequency bias recipe is to enable relatively high AR with small notching effect in SOI wafer process. Finally, the low power recipe is to minimize the heating problem that is caused during DRIE.